产品概述
The SN74LS107AN is a two independent Negative-Edge-Triggered Flip-flop with J and K inputs must be stable prior to the high-to-low clock transition for predictable operation. When the clear is low, it overrides the clock and data inputs forcing the Q output low and the Q output high.
- 7V Input voltage
- 2V High-level input voltage
- 0.8V Low-level input voltage
应用
工业
产品信息
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- 74LS107
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- JK
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- 15ns
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- 30MHz
- :
- 8mA
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- DIP
- :
- 14引脚
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- 上升沿
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- 互补
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- 4.75V
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- 5.25V
- :
- 74LS
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- 74107
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- 0°C
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- 70°C
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- -
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- -
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- -