产品概述
The SN74LS73AN is a dual J-K Flip-flop with clear with LS technology and two independent J-K flip-flops with individual J-K, clock and direct clear inputs. The LS73A contains two independent negative-edge-triggered flip-flops. The J and K inputs must be stable one setup time prior to the high-to-low clock transition for predictable operation. When the clear is low, it overrides the clock and data inputs forcing the Q output low and the Q output high.
- TTL input and output
应用
工业, 通信与网络
产品信息
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- 74LS73
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- JK
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- 15ns
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- 30MHz
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- 8mA
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- DIP
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- 14引脚
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- 下降沿
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- 互补
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- 4.75V
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- 5.25V
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- 74LS
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- 7473
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- 0°C
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- 70°C
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- -
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- -
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- -