产品概述
The SN74LS390N is a 4bit dual decade counter contains eight flip-flops and additional gating to implement two individual four-bit counters. It incorporates dual divide-by-two and divide-by-five counter, which can be used to implement cycle lengths equal to any whole and/or cumulative multiples of 2 and/or 5 up to divide-by-100. When connected as a bi-quinary counter, the separate divide-by-two circuit can be used to provide symmetry (a square wave) at the final output stage. It comprises two independent four-bit binary counters each having a clear and a clock input. N-bit binary counters can be implemented with each package providing the capability of divide-by-256. It has parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system-timing signals.
- Direct clear for each 4bit counter
- Buffered outputs reduce possibility of collector commutation
产品信息
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- 74LS390
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- 十进位
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- 35MHz
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- 10
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- DIP
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- 16引脚
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- 4.75V
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- 5.25V
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- 74LS
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- 74390
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- 0°C
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- 70°C
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- -
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- -