产品概述
The SN74LVC2G02DCUT is a dual 2-input positive-NOR Gate. The device performs the Boolean function Y = (A + B)\ or Y = A\ • B\ in positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
- ±24mA Output drive at 3.3V
- <0.8V at VCC = 3.3V (typical) VOLP (Output ground bounce)
- >2V at VCC = 3.3V Typical VOHV (Output VOH undershoot)
- 10µA Maximum ICC low power consumption
- Inputs accept voltages to 5.5V
- Maximum tpd of 4.9ns at 3.3V
- Ioff supports partial-power-down mode operation
- ESD protection exceeds JESD 22
- Latch-up performance exceeds 100mA per JESD 78, Class II
- Green product and no Sb/Br
应用
工业
产品信息
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- NOR门
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- 双
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- 2
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- 8引脚
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- VSSOP
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- 74LVC2G02
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- 74LVC
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- 1.65V
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- 5.5V
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- 无施密特触发器输入
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- 32mA
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- -40°C
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- 85°C
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- -
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- MSL 1 -无限制