产品概述
The SN74HC573ADW is an octal transparent D Latch with 3-state outputs. It is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. While the LE input is high, the Q outputs respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up. A buffered OE input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pull-up components. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor.
- High-current 3-state outputs drive bus lines directly or up to 15 LSTTL loads
- Bus-structured pinout
- 80µA Maximum low power consumption
- 21ns Propagation delay (typical)
- ±6mA Output drive at 5V
- 1µA Maximum low input current
- Green product and no Sb/Br
应用
通信与网络, 工业
产品信息
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- 74HC573
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- D型透明
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- 三态
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- 43ns
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- 7.8mA
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- SOIC
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- 20引脚
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- 2V
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- 6V
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- 8位
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- 74HC
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- 74573
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- -40°C
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- 85°C
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- -
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- -
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- MSL 1 -无限制