SN74F573DW .

产品概述

The SN74F573DW is an octal transparent D Latch with 3-state outputs. It is designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. The eight latches of the F573 are transparent D-type latches. While the latch enable input is high, the Q outputs follow the data (D) inputs. When the latch enable is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered OE input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high- impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pull-up components.

  • Full parallel access for loading
  • Buffered control inputs

应用

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产品信息


:
74F573

:
D型透明

:
三态

:
8ns

:
24mA

:
SOIC

:
20引脚

:
4.5V

:
5.5V

:
8位

:
74F

:
74573

:
0°C

:
70°C

:
-

:
-

:
MSL 1 -无限制

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