产品概述
The SN74HC164D is a 8-bit parallel-out serial Shift Register features AND-gated serial inputs and an asynchronous clear (CLR) input. The gated serial (A and B) inputs permit complete control over incoming data, a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock (CLK) pulse. A high-level input enables the other input, which then determines the state of the first flip-flop. Data at the serial inputs can be changed while CLK is high or low, provided the minimum set-up time requirements are met. clocking occurs on the low-to-high-level transition of CLK.
- Outputs can drive up to 10 LSTTL loads
- 80µA Maximum low power consumption
- Typical tpd = 20ns
- ±4mA Output drive at 5V
- 1µA Maximum low input current
- AND-gated (enable/disable) serial inputs
- Fully buffered clock and serial inputs
- Direct clear
- Green product and no Sb/Br
应用
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产品信息
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- 74HC164
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- 串行至并行
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- 1元件
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- 8bit
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- SOIC
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- 14引脚
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- 2V
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- 6V
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- 标准型
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- 74HC
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- 74164
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- -40°C
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- 85°C
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- -
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- -
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- MSL 1 -无限制