产品概述
The SN74LS164N is a serial-in Shift Register features gated serial inputs and an asynchronous clear. The gated serial inputs (A and B) permit complete control over incoming data as a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock pulse. A high-level input enables the other input which will then determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is high or low, but only information meeting the setup-time requirements will be entered. Clocking occurs on the low-to-high-level transition of the clock input. All inputs are diode-clamped to minimize transmission-line effects.
- Gated serial inputs
- Fully buffered clock and serial inputs
- Asynchronous clear
应用
工业, 通信与网络
产品信息
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- 74LS164
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- 串行至并行
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- 1元件
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- 8bit
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- DIP
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- 14引脚
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- 4.75V
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- 5.25V
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- 标准型
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- 74LS
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- 74164
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- 0°C
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- 70°C
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- -
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- -
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- -